RegViz: Visualize STARTERP0 Bitfield

NXP Semiconductors /LPC13xx /SYSCON /STARTERP0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as STARTERP0

Description

Start logic signal enable register 0; bottom 32 interrupts

Fields

ERPIO0_0	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_1	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_2	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_3	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_4	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_5	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_6	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_7	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_8	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_9	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_10	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO0_11	Enable start signal for start logic input PIO0_n (bit 0 = PIO0_1, …, bit 11 = PIO0_11). 0 = Disabled. 1 = Enabled.
ERPIO1_0	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_1	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_2	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_3	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_4	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_5	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_6	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_7	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_8	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_9	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_10	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO1_11	Enable start signal for start logic input PIO1_n (bit 12 = PIO1_0, …, bit 23 = PIO1_11). 0 = Disabled. 1 = Enabled.
ERPIO2_0	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_1	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_2	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_3	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_4	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_5	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_6	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.
ERPIO2_7	Enable start signal for start logic input PIO2_n (bit 24 = PIO2_0, …, bit 31 = PIO2_7). 0 = Disabled. 1 = Enabled.

Links

()